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Posts: 1,671 | Thanked: 11,478 times | Joined on Jun 2008 @ Warsaw, Poland
#12
So, Flip():

Code:
  IMG_VOID Flip (OMAPLCD_DEVINFO * psDevInfo, unsigned long ui32DevAddr)
{
  IMG_UINT32 control;
  WriteReg ((IMG_VOID *) ((IMG_UINT8 *) psDevInfo->sFBInfo.pvRegs +
                             OMAPLCD_GFX_BA0), ui32DevAddr);
  WriteReg ((IMG_VOID *) ((IMG_UINT8 *) psDevInfo->sFBInfo.pvRegs +
                           OMAPLCD_GFX_BA1), ui32DevAddr);
  control =
    ReadReg ((IMG_VOID *) ((IMG_UINT8 *) psDevInfo->sFBInfo.pvRegs +
                           OMAPLCD_CONTROL));
  control |= OMAP_CONTROL_GOLCD;
  WriteReg ((IMG_VOID *) ((IMG_UINT8 *) psDevInfo->sFBInfo.pvRegs +
                           OMAPLCD_CONTROL), control);
} static IMG_BOOL
Together with this from the graphics subsystem manual mentioned above:

Base address of the graphics buffer in system memory (DSS.DISPC_GFX_BAi registers): The default
value of these two registers at reset time is 0x0. The horizontal resolution is one pixel because the
base address is aligned on a pixel size boundary. In case of 4 BPP, the resolution is two pixels; for 2
BPP, resolution is four pixels; for 1 BPP, resolution is eight pixels; and for RGB24 packed format, the
resolution is four pixels. The vertical resolution is one line. The register DSS.DISPC_GFX_BA0 defines
the base address of the even field; and DSS.DISPC_GFX_BA1 defines the base of the odd field in the
case of an external synchronization and based on the value of the input signal DISPC_FID and the
polarity. To improve system throughput, the base address should be aligned on the burst size
boundary.

Means Flip() is basically pointing that particular plane to the address and then noting the chip about it (GOLCD). Now, my thought is then to do along these lines, pseudocode galore:

When doing a flip (ie, point to a new framebuffer to be shown), - yes, this call is exported by blizzard.c.

int blizzard_update_window_async(struct fb_info *fbi,
struct omapfb_update_window *win,
void (*complete_callback)(void *arg),
void *complete_callback_data)

with a callback being the Vsync ISR, with the IRQ parts removed. That then checks if there's things to be flipped and runs complete() calls and all that stuff and calls a Flip() if need be, making it possible to get Vsync ISR called again.

If I'm right and omaplcd_ddc_process_vsyncflip is actually the entry point for the incoming frames, the first Flip() it does when there's no frames waiting in queue besides the incoming (read: no need to wait for vsync, just write to the buffer), will make sure the VsyncFlip() method gets called each time it's done transferring/flipping a frame.

Now, how difficult is it for us to add blizzard_update_window_async support in Flip() and strip out the IRQ stuff of the ISR, and provide a callback wrapper for VSyncFlip for blizzard_update_window_async?
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