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Posts: 306 | Thanked: 566 times | Joined on Jan 2010 @ Romania
#1007
i seen code a month ago .....but
come on ...both vbus & !ID true is missing
added bold my diff ( warn: only the idea not functional code )

354 /* STS_HW_CONDITIONS */
355 status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER, 0x0f);
356 if (status < 0)
357 dev_err(twl->dev, "USB link status err %d\n", status);

else if ((status & BIT(7)) & (status & BIT(2))
linkstat=USB_LINK_ POWEREDHOST /*must be added in enum linkstat */

358 else if (status & BIT(7))
359 linkstat = USB_LINK_VBUS;
360 else if (status & BIT(2))
361 linkstat = USB_LINK_ID;
362 else
363 linkstat = USB_LINK_NONE;
364
365 dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
366 status, status, linkstat);
367
368 /* REVISIT this assumes host and peripheral controllers
369 * are registered, and that both are active...

because when vbus=true => PERIPHERAL only
we need replace
.................................................. .......
374 if (linkstat == USB_LINK_ID) {
375 twl->otg.default_a = true;
376 twl->otg.state = OTG_STATE_A_IDLE;
377 }

else if ( linkstat==USB_LINK_ POWEREDHOST){
twl->otg.default_a = true;
twl->otg.state = OTG_STATE_A_WAIT_BCON: /* not shure if will work*/
}

else {
378 twl->otg.default_a = false;
379 twl->otg.state = OTG_STATE_B_IDLE;
380 }

waiting vbus rise is not needed to enter a_wait_bconn because vbus is here and state machine can jump directly into this stage

and a routine sensing D+ rise is needed for peripheral insert sense but must be started after one bus suspend condition

Last edited by blue_led; 2010-06-01 at 19:53.
 

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