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Posts: 2,222 | Thanked: 12,651 times | Joined on Mar 2010 @ SOL 3
#2850
[on behalf of atk/Arch-TK (Tomasz Kramkowski) who has no account - yet. Many thanks for this fine summary!]

Today on IRC me (atk) and Joerg discussed an issue which has recently surfaced
on the tinkerphones mailing list [1] regarding the yields Nikolaus Schaller of
goldelico reported with the production of the GTA04A5.

The yields reported by Nikolaus are at 30% which is obviously not financially
viable for production; the issue has been identified as warping during the
soldering of the Samsung PoP [2] memory and DM3730 to the PCB.

The reason this issue has not appeared on prior devices (OpenPandora and
GTA04A4) is because those devices have used Micron PoP memory instead of
Samsung PoP memory which unfortunately is no longer in production.

Since the Neo900 project is also based around the DM3730 it will also need to
use very similar memory and there is a high risk that the issues which arose
during the production of the GTA04A5 will arise during the production of the
Neo900.

There are however some methods that Joerg described which could be used to
mitigate the issue and bring yields to acceptable figures:

Pre-stacking [3] is a method where the PoP memory chip is first soldered to the
DM3730 before being placed on the PCB and reflowed; this method should reduce
the warping and stresses caused by the usual method of soldering such stacked
chips which simply involves soldering them all in one go.

Another option that Joerg has suggested is filling the gap between the
pre-stacked chips with underfill before the chips are soldered to the PCB. This
should make the combined package considerably more rigid and prevent the issues
caused by warping.

Joerg believes that there is a good chance that the sum of these two methods
should solve the yield problems of these "unsolderable" chips. Joerg feels
testing the approach should not cost too much and that the costs incurred would
be in production, as most assembly lines do not have the equipment for
pre-stacking. To add to this, the new idea of adding underfill to the
pre-stacked chips before they are soldered has never been done before.

Joerg estimates the additional production costs may be around $10 to $20 per
device however I personally feel this is an acceptable cost if it means
increased durability of the device.

The full details of the conversation can be found in the logs here:
https://irclog.whitequark.org/neo900...03-14#19041338

[1]: http://lists.goldelico.com/pipermail...ry/001571.html
[2]: https://en.wikipedia.org/wiki/Package_on_package
[3]: http://www.ti.com/lit/an/swpa182c/swpa182c.pdf#19

Last edited by joerg_rw; 2017-03-14 at 22:38.
 

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