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#12
Originally Posted by Marshall Banana View Post
Can somebody enlighten me what's the point of this design?
One low power co-proccessor for standby-stuff i could understand, but what's this good for:
2x Cortex A72 @2.5GHz
4x Cortex A53 @2.0GHz
4x Cortex A53 @1.55GHz

If i run a webserver on my pocket-computer or do heterogenous supercomputing?

Or is it for power management?
To quote Anand:

http://www.anandtech.com/show/9227/mediatek-helio-x20

"I like to see MediaTek's tri-cluster approach as an extension to the existing dual A53 cluster designs - where the added A72 cluster is truly optimized for only the highest frequencies. Indeed, we are told that the A72 cluster can reach up to 2.5GHz on a TSMC 20nm process. ARM aims similar clocks for the A72 but at only 14/16nm FinFET processes, so to see MediaTek go this high on 20nm is impressive, even if it's only a two-core cluster. It will be interesting to see how MediaTek chooses the lower frequency limits on each cluster, especially the A72 CPUs, or how these options will be presented to OEMs.

The end-result is a promised 30% improvement in power consumption over a similar 2-cluster approach. This happens thanks to the finer granularity in the performance/power curve and an increase in available performance-power points for the scheduler to place a thread on. Having a process that is heavy enough that it is not capable of residing on the smallest cluster due to performance constraints, but not demanding enough to require the big cluster's full performance, can now reside on this medium cluster at much greater efficiency than had it been running on the big cluster at reduced clocks. MediaTek uses CorePilot as a custom developed scheduler implementation that is both power aware and very advanced (based on our internal testing of other MediaTek SoCs). My experience and research with it on existing devices was fairly positive, so I'm sure the X20's new v3.0 implementation of CorePilot will be able to take good advantage of the tri-cluster design.

The biggest question and need of clarification is in the area of what the MCSI (the interconnect) is capable of. ARM had announced its CCI-500 interconnect back in February, which incidentally also promised the capability of up to 4 CPU clusters. MediaTek hinted that this may be a design based on ARM's CCI - but we're still not sure if this means a loosely based design or a direct improvement of ARM's IP."

But I broadly agree, it seems a little OTT.

In the X20's favour:
A72 high perofmance cores.
Relatively modern 20nm fab process.
Vulkan capable graphics engine.

In the X20's deficit column:
It's Mtek, so traditionally poor linux driver support.
 

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