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#21
 

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#22
Another understanding is that :

IVA 1.0 and IVA 2.2 are functionally similar

2420 is using a C55 DSP and an ARM7 (accellerator and sequencer)
and
3430 is using a C6x DSP, an ARM968 (accellerator and sequencer)

Full manual of 34XX processor is here
http://focus.ti.com/pdfs/wtbu/SWPU11...06_10_2008.pdf

with PowerVR processor, IVA 2.2 and all modules ;-)

I don't want leave a beautiful machine as n810 with 50% of functionalities...
:P
 
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#23
It's possible find IVA 2.2 driver implemented here :

http://www.omapzoom.org/pub/dspbridge/
 
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#24
Theres a lot in that document.
If it does match with what we have in our machines and we can make use of even a fraction of the functions within I think we are for teh win.
 
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#25
From the looks of it, other than offering an extra ARM7 + MMU to do the algorithmic stuff, the IVA offers burst compression/decompression, Variable length decode (VLC engine) and parallel accumulators (iMX).

It says in the doc which I linked that these are DSP coprocessors, and therefore the DSP should be able to use them. I seem to remember seeing some mention of at least VLC for our DSP, though I can't find where (so I might have imagined it).

Assuming we can access these hw acceleration fns from the DSP, we've got nearly all of the functionality already, for no extra work. The DSP already uses coprocessors for iDCT/DCT accel and Motion Estimation and Pixel interpolation (see spru098). It might be worth looking at the IMGLIB headers (description in SPRU037C) to see if some of these fns (such as VLC) are performed using the copr() instruction. If so, I think we've already got what we need.
 

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#26
It's possible find IVA 2.2 driver implemented here :

http://www.omapzoom.org/pub/dspbridge/
That's for the OMAP3xxx.

The Ti released code for the DSP bridge for the OMAP24xx would be a better place to look for something that will work on our processors.
 
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#27
Simon,

It was my understanding the the entire IVA unit was a full and seperate DSP_On_Speed.
The IVA contains everything the normal DSP contains (its just a silicon duplication) as well as the extra image specific functions.

Even if we cannot talk directly to it (because of the dspgateway problem fanoush mentioned) it could at least give us some lateral ideas about how to utilitise the working dsp for images.

I'm pleased we have some documentation and hope it proves useful.
 
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#28
yes IVA is a processor (or sequence) and a DSP (accellerator) with RAM and ROM...
:-)
 
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#29
Originally Posted by lardman View Post

The Ti released code for the DSP bridge for the OMAP24xx would be a better place to look for something that will work on our processors.
when ??? and do you have link ?
 
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#30
Originally Posted by overflo View Post
Another understanding is that :

IVA 1.0 and IVA 2.2 are functionally similar

2420 is using a C55 DSP and an ARM7 (accellerator and sequencer)
and
3430 is using a C6x DSP, an ARM968 (accellerator and sequencer)

Full manual of 34XX processor is here
http://focus.ti.com/pdfs/wtbu/SWPU11...06_10_2008.pdf
Well they are similar in the sense that it is designed to accelerate multimedia but otherwise they are completely different. IVA 1 is another ARM(7TDMI) core next to C55 DSP and main ARM core. IVA 2 is different name for C64x+ DSP present on OMAP3 chips, no extra third (ARM or DSP) core here.
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